This is what ends up in program memory at startup.
000: 63 =077 001: 61 =075 002: 43 =053 003: 30 =036 004: 8 =010 005: 20 =024 006: 42 =052 007: 43 =053 008: 28 =034 009: 14 =016 010: 50 =062 011: 42 =052 012: 43 =053 013: 27 =033 014: 8 =010 015: 19 =023 016: 42 =052 017: 43 =053 018: 26 =032 019: 13 =015 020: 42 =052 021: 43 =053 022: 24 =030 023: 17 =021 024: 42 =052 025: 0 026: 0
The 63 61 is the start of program memory marker.
Next, “43 30 08 20 42” is likely to be “LBL A g 4 RTN” = “A -> 1/x”
Then, “43 28 14 50 42” = “LBL B f 9 RTN” = “B -> root x”
Then, “43 27 08 19 42” = “LBL C g 5 RTN” = “C -> Yx”
Then, “43 26 13 42” = “LBL D ? RTN” = “D -> R down” so 13 must be “g 8”
and, “43 24 17 42” = “LBL E ? RTN” = “E -> x <=> y” so 17 must be “g 7”
For the most part, the codes stored internally by the ’65 (above) match the codes the keyboard generates on each key press. The exceptions are merged keycodes.
There used to be a table showing the 64 different HP65 program codes but I’m having trouble finding a copy after so many years. I may just have to work them all out by hand! At least there’s only 64. That’s due to the program steps being stored in 6-bit memory. There are 100 program steps and these got written as 600 bits on the HP65 magnetic cards.
(The HP67 fancied that up somewhat and added headers and status info and a checksum. It also uses 8-bit program steps. There was 7 nibbles of 0s for sync, 14 nibbles of status, 112 program steps (8 bits) then 7 nibbles of checksum. Hence the ’67 had (7×4 + 14×4 + 112*8 + 7*4 = 28 + 56 + 896 + 28 =) 1008 bits per card side.)
Update 15 Sep 2015:
I found the chart again. I’ve stuck a copy at hp65-program-codes so I can find it next time.
